AMD Demonstrates Accelerated Computing ICs That Break Teraflop Barrier |
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Friday, 02 March 2007 |
AMD showcased a single-system, Accelerated Computing platform that breaks the teraflop computing barrier. Organizations are ultimately expected to be able to apply this technology to a wide range of scientific, medical, business and consumer computing applications. At a press event in San Francisco, AMD demonstrated a “Teraflop in a Box” system running a standard version of Microsoft Windows XP Professional that harnessed the power of AMD Opteron dual-core processor technology and two next-generation AMD R600 Stream Processors capable of performing more than 1 trillion floating-point calculations per second using a general “multiply-add” (MADD) calculation. This achievement represents a ten-fold performance increase over today’s high-performance server platforms, which deliver approximately 100 billion calculations per second....more  (0) Comments |
Phase Change Memory Could Replace Flash, Disk Drives |
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Friday, 02 March 2007 |
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A cooperative effort by IBM, Macronix International, and Qimonda has resulted in a new type of computer memory that could replace disk drives in some applications. Known as phase-change memory, the new technology combines some of the best features of Flash memory and Dynamic Random Access Memory (DRAM). Like a DRAM product, its read/write access times are far faster than those of Flash memories or disk drives, but unlike a DRAM, it potentially offers low cost and non-volatile performance, so it doesn't lose its contents when the power is turned off as a DRAM would....more (0) Comments |
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Graphene Transistor Promises Life After Death Of Silicon Chip |
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Thursday, 01 March 2007 |
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Researchers have used the world's thinnest material to create the world's smallest transistor - a breakthrough that could spark the development of a new type of super-fast computer chip. Professor Andre Geim and Dr Kostya Novoselov from The School of Physics and Astronomy at The University of Manchester, reveal details of transistors that are only one atom thick and less than 50 atoms wide, in the March issue of Nature Materials. They believe this innovation will allow the rapid miniaturization of electronics to continue when the current silicon-based technology runs out of steam....more (0) Comments |
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IBM To Roll Out 45-nm Immersion Process By End Of Year |
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Monday, 26 February 2007 |
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IBM and its growing list of silicon manufacturing partners will begin rolling out immersion lithography for 45-nanometer processes in Q4, a technology that IBM believes will carry silicon manufacturing to 22-nanometers and possibly beyond. The announcement has a litany of ramifications because of the long list of partners now working with IBM. AMD, for one, will remain toe-to-toe with Intel on the Moore’s Law road map for x86 processors. In addition, IBM partners Freescale, Toshiba, Sony, Infineon and Samsung will remain on the cutting edge of the road map for a variety of other semiconductors. And IBM manufacturing partners Samsung and Chartered Semiconductor will remain on the forefront of manufacturing processes at the most advanced and increasingly expensive nodes....more (0) Comments |
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EEMBC Unveils Plans For Multicore Benchmarks |
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Thursday, 22 February 2007 |
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The Embedded Microprocessor Benchmark Consortium announced plans to roll out new benchmarks that will address multiprocessing systems, multicore processors, and multithreaded processors. The EEMBC effort, which has been underway since mid-2006, is being led by John Goodacre of ARM, who serves as chair of EEMBC's multiprocessing workgroup. With the proliferation of multicore processor implementations, the need is growing for performance benchmarks that can give an accurate indication of the value of transitioning from a single core to a multicore system, in addition to determining the impact of system-level bottlenecks, such as those encountered when moving data on and off a multicore chip. EEMBC is addressing this challenge with new multicore benchmark suites that will enable a standardized evaluation of the benefits of concurrency while providing the scalability needed to support any number of multiple cores. EEMBC's multicore benchmark software will initially support symmetrical multicore processors with shared memory and will utilize a thread-based API to establish a common programming model....more (0) Comments |
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The Future Of Scalable STT-RAM As A Universal Embedded Memory |
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Thursday, 22 February 2007 |
Having gotten word that Flash, SRAM, and DRAM will be hitting the wall at or around the 45 nanometer (nm) technology node, embedded designers are looking for the Holy Grail of memory as the industry moves in lockstep into smaller and smaller geometries. But, scalability is only one issue facing conventional memory. SRAM is experiencing problems with increased leakage power, and Flash is experiencing endurance issues as well. Memory vendors are coming forward with alternative solutions. These include phase-change RAM (PRAM), ferroelectric, resistive RAM, as well as conventional magnetic RAM. Each poses its own set of limitations.
As vendors put extra touches on these candidates to make them more attractive to embedded designers, traditional SRAM and NOR and NAND flash are facing their own difficulties. SRAM continues to tout its high speeds. But the problem is it doesn't scale very well; it has cell instability, and suffers from leakage current, which only gets worse beyond 45 nm. These issues are especially problematic for mobile applications....more (0) Comments |
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