IBM Moves Moore's Law Into The Third-Dimension |
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Monday, 16 April 2007 |
IBM announced a chip-stacking technology in a manufacturing environment that paves the way for three-dimensional chips that will extend Moore’s Law beyond its expected limits. The technology – called “through-silicon vias” -- allows different chip components to be packaged much closer together for faster, smaller, and lower-power systems. The IBM development enables the move from horizontal 2-D chip layouts to 3-D chip stacking, which takes chips and memory devices that traditionally sit side by side on a silicon wafer and stacks them together on top of one another. The result is a compact sandwich of components that dramatically reduces the size of the overall chip package and boosts the speed at which data flows among the functions on the chip....more  (0) Comments |
Studies Warn Of Nanoparticle Health Effects |
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Monday, 16 April 2007 |
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Scientists at the University of California at San Diego and the nearby Veterans Affairs Medical Healthcare System in La Jolla recently concluded that magnetic nanoparticles may be hazardous to your health. Experiments revealed that iron oxide particles less than 10 nanometers in diameter stunt the growth of nerve cells. Separate in vitro experiments at the National Institute of Standards and Technology (NIST) have also concluded that nanotubes shorter than 200 nanometers interfere with human lung cells. Both groups called for animal testing that would not only quantify the toxic effects of nanomaterials on living organisms but also characterize the most toxic types of nanomaterials. Currently the National Science Foundation (NSF) spends almost 10 times more on developing nanomaterials than on engineering to prevent their toxic effects....more (0) Comments |
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Tessera Introduces Interconnection Technology |
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Monday, 16 April 2007 |
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Tessera Technologies announced the MicroPILR interconnect platform for semiconductor packages, substrates, Printed Circuit Boards (PCBs) and other electronic components. The interconnection is achieved through low-profile, pin-shaped contacts which replace conventional technologies used today, such as solder balls on semiconductor packages and plated vias in package substrates and PCBs. These contacts deliver a number of key benefits needed to meet emerging product roadmaps, including significantly reduced profile, fine pitch, improved electrical and thermal performance, and enhanced reliability....more (0) Comments |
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Low-Cost Low-Power PLDs Accelerate Designs |
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Friday, 13 April 2007 |
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System designers often use programmable logic devices in their embedded systems because of the design flexibility provided by the chips' in-system programmability (ISP). ISP allows designers to respond quickly to changing standards and market requirements. PLDs have traditionally been higher-power and relatively high-cost solutions. Over the past two years, however, devices have been introduced that satisfy the low-cost low-power demands of various high-volume applications, including networking and communications, computing and peripherals, industrial, medical, consumer, and automotive....more (0) Comments |
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Mayo Clinic And IBM Score Significant Advance In Real-Time 3D Medical Imaging |
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Thursday, 12 April 2007 |
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Collaborators from Mayo Clinic and IBM have exploited parallel computer architecture and memory bandwidth to dramatically speed up the processing of 3-D medical images. The advance significantly aids image registration -- the computer-enhanced alignment of two medical images obtained at different dates or by using different imaging devices, in three-dimensional space. With the images properly aligned over one another, a radiologist can more easily detect structural changes such as the growth or shrinkage of tumors....more (0) Comments |
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IBM Moves Moore's Law Into The Third-Dimension |
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Thursday, 12 April 2007 |
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IBM announced a chip-stacking technology in a manufacturing environment that paves the way for three-dimensional chips that will extend Moore’s Law beyond its expected limits. The technology – called “through-silicon vias” -- allows different chip components to be packaged much closer together for faster, smaller, and lower-power systems. The IBM development enables the move from horizontal 2-D chip layouts to 3-D chip stacking, which takes chips and memory devices that traditionally sit side by side on a silicon wafer and stacks them together on top of one another. The result is a compact sandwich of components that dramatically reduces the size of the overall chip package and boosts the speed at which data flows among the functions on the chip....more (0) Comments |
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