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1  Electronic Design / Business / The OP400, OP07 GENERAL DESCRIPTION on: December 14, 2008, 11:32:39 PM
The OP400, OP07 GENERAL DESCRIPTION

The OP400 GENERAL DESCRIPTION
The OP400 is the first monolithic quad operational amplifier
that features OP77 type performance. Precision performance no
longer has to be sacrificed to obtain the space and cost savings
offered by quad amplifiers.
The OP400 features an extremely low input offset voltage of
less than 150 mV with a drift of under 1.2 mV/°C, guaranteed
over the full military temperature range. Open-loop gain of the
OP400 is over 5,000,000 into a 10 kW load, input bias current is
under 3 nA, CMR is above 120 dB, and PSRR is below 1.8 mV/V.
On-chip zener-zap trimming is used to achieve the low input
offset voltage of the OP400 and eliminates the need for offset
nulling. The OP400 conforms to the industry-standard quad
pinout which does not have null terminals.

http://www.seekic.com/newstock/OP41FS,OP41FZ,OP41G.html
 Posted just now
2  Electronic Design / Business / GRM155R61A683KA01 pdf and datasheet on: December 11, 2008, 11:23:43 PM
GRM155R61A683KA01 pdf and datasheet
Solder the capacitor on the test jig (glass epoxy board) in the
same manner and under the same conditions as (10).
The capacitor should be subjected to a simple harmonic motion
having a total amplitude of 1.5mm, the frequency being varied
uniformly between the approximate limits of 10 and 55Hz. The
requency range, from 10 to 55Hz and return to 10Hz, should
be traversed in approximately 1 minute. This motion should be
applied for a period of 2 hours in each 3mutuallyperpendiculardirections (total of 6 hours).Solder the capacitor on the test jig (glass epoxy board) showin Fig. 1a using an eutectic solder. Then apply 10Nforce in
parallel with the test jig for 10W/Y1sec.
The soldering should be done either with an iron or using th
reflow method and should be conducted with care so that th
soldering is uniform and free of defects such as heat shock.

http://www.seekic.com/newstock/GRM40X7R333K050BL,GRM40X7R333K100,GRM40X7R333K50.html
3  Electronic Design / Business / The FS8107E pdf and datasheet on: December 10, 2008, 10:31:42 PM
Description
The FS8107E is a serial data input, phase-locked loop IC with programmable input and
reference frequency dividers. When combined with a VCO, the FS8107E becomes the
core of a very low power frequency synthesizer well-suited for mobile communication
applications such as paging systems. Compared to the FS8100, the FS8107E is hous
in a smaller package and also implements a separate pin for stand-by control.

http://www.seekic.com/newstock/FS8...6033CJ,FS8860-33CJ,FS8860-33PJ.html
4  Electronic Design / Product Design / The XC6101~XC6107, XC6111~XC6117 pdf and datasheet on: December 09, 2008, 11:21:26 PM
The XC6101~XC6107, XC6111~XC6117 series aregroups of high-precision, low current consumption voltagedetectors with manual reset input function and watchdogfunctions incorporating CMOS process technology. Theseries consist of a reference voltage source, delay circuit,comparator, and output driver. With the built-in delay circuit, the XC6101 ~ XC6107,XC6111 ~ XC6117 series!ˉ ICs do not require any externacomponents to output signals with release delay time.Moreover, with the manual reset function, reset can beasserted at any time. The ICs produce two types of
output; VDFL (low when detected) and VDFH (high whendetected). With the XC6101 ~ XC6105, XC6111 ~ XC6115 series!ICs, the WD pin can be left open if the watchdog function
is not used. Whenever the watchdog pin is opened, the internalcounter clears before the watchdog timeout occurs.Since the manual reset pin is internally pulled up to the VINpin voltage level, the ICs can be used with the manualreset pin left unconnected if the pin is unused.
The detect voltages are internally fixed 1.6V ~ 5.0V inincrements of 100mV, using laser trimming technology. Six watchdog timeout period settings are available in arange from 6.25msec to


http://www.seekic.com/newstock/XC6...73MR,XC6366D102MR,XC6366D103MR.html
5  Electronic Design / Product Design / MIC2111GMBML pdf and datasheet General Description on: December 08, 2008, 11:56:15 PM
http://www.seekic.com/newstock/MIC...1GMBML,MIC2141BM5,MIC2141YM5TR.html

MIC2111GMBML pdf and datasheet General Description
The MIC10941 and MIC10939 Alphanumeric and Bargraph
Display Controller is a two-chip MOS/LSI general purpose
display controller system designed to interface with bargraph
and segmented displays (vacuum fluorescent or LED).
The two-chip set will drive displays with up to 16 segments
(plus decimal point and comma tail) and up to 20 grids
(characters) plus a cursor. The chips can be cascaded to
drive larger displays of 80 characters. Segment decoding for
ASCII characters and bargraph patterns is accomplished
through an internal PLA.

Features
• 20-character display driver cascadable to 80 characters
• Direct drive capability for vacuum-fluorescent displays
• 128 ? 18 PLA provides segment decoding for ASCII
characters (all caps only) and bargraph patterns
• Serial or parallel data input for 8-bit display and control
characters
• Brightness, refresh rate, and display mode controls
• Separate cursor driver output
• 40-pin DIP or 44-pin PLCC (MIC10939)
• 24-pin DIP package (MIC10941)
6  Electronic Design / Product Design / Product Highlights of VI-200 on: December 07, 2008, 11:01:28 PM
Product Highlights of VI-200
The VI-200 Family, with over 8 million shipped, is Vicor’s first generation of “zero-current-switching” component-level DC-DC converters.
Operating at frequencies up to 2 MHz, VI-200 Family Converters offer exceptional power density, efficiency,noise performance, reliability and ease of
use. Power Boosters provide a simple, cost effective, off-the-shelf solution for higher power output requirements. One or more boosters may be used to create synchronous arrays capable of supplying several
kilowatts of output power. The flexibility of Vicor’s power components is also available in half-size, half-powerVI-J00 MiniMods. (pg. 72)

http://www.seekic.com/newstock/VI-J1M-EW,VI-J1M-EX,VI-J1M-EY.html
7  Electronic Design / Product Design / EPM1270 EPM2210 pdf and datasheet on: December 05, 2008, 12:10:08 AM
EPM1270  EPM2210 pdf and datasheet
All MAX  II devices provide Joint Test Action Group (JTAG) boundary-scan test (BST) circuitry that complies with the IEEE Std. 1149.1-2001 specification. JTAG boundary-scan testing can only be performed at any  and all V  banks have been fully powered and a time after VCCINT CCIOt  amount of time has passed. MAX II devices can also use the JTAG CONFIGII port for in-system programming together with either the QuartusTMsoftware or hardware using Programming Object Files (.pof), Jam  Standard Test and Programming Language (STAPL) Files (.jam) or Jam Byte-Code Files (.jbc).
The JTAG pins support 1.5-V, 1.8-V, 2.5-V, or 3.3-V I/O standards. The  of the supported voltage level and standard is determined by the VCCIObank where it resides. The dedicated JTAG pins reside in Bank 1 of all MAX II devices.  MAX II devices support the JTAG instructions shown in Table3¨C.

http://www.seekic.com/newstock/EPM7064LC44-10,EPM7064LC4412,EPM7064LC44-12.html
8  Electronic Design / Product Design / The XC6101~XC6107, XC6111~XC6117 pdf and datasheet on: December 03, 2008, 11:37:30 PM
The XC6101~XC6107, XC6111~XC6117 pdf and datasheet

The XC6101~XC6107, XC6111~XC6117 series aregroups of high-precision, low current consumption voltagedetectors with manual reset input function and watchdogfunctions incorporating CMOS process technology.  Theseries consist of a reference voltage source, delay circuit,comparator, and output driver.   With the built-in delay circuit, the XC6101 ~ XC6107,XC6111 ~ XC6117 series!ˉ ICs do not require any externacomponents to output signals with release delay time.Moreover, with the manual reset function, reset can beasserted at any time.  The ICs produce two types of
output; VDFL (low when detected) and VDFH (high whendetected). With the XC6101 ~ XC6105, XC6111 ~ XC6115 series!ICs, the WD pin can be left open if the watchdog function
is not used.   Whenever the watchdog pin is opened, the internalcounter clears before the  watchdog timeout occurs.Since the manual reset pin is internally pulled up to the VINpin voltage level, the ICs can be used with the manualreset pin left unconnected if the pin is unused.
The detect voltages are internally fixed 1.6V ~ 5.0V inincrements of 100mV, using laser trimming technology. Six watchdog timeout period settings are available in arange from 6.25msec to


http://www.seekic.com/newstock/XC6366C273MR,XC6366D102MR,XC6366D103MR.html

9  Electronic Design / Product Design / RH500-P RH500-S pdf and datasheet on: December 03, 2008, 12:07:57 AM
RH500-P RH500-S pdf and datasheet

For the electronic measurement of currents: AC, pulsed, mixed, with
a galvanic isolation between the primary circuit (high power) and the
secondary circuit (electronic circuit).

Applications Observing complicated current
waveforms High speed and high current
sensing such as IGBT Welding Power unit Electric

power regulator Discharge tube Antenna

Monitoring for irruptive current

Advantages Wide sensing range Wide frequency

 range Quick response No hysteresis error No insertion

impedance Small size and lightweight

http://www.seekic.com/newstock/RH5VA29AA-T1,RH5VA29CA-T1,RH5VA30AA-T1.html
10  Electronic Design / Business / AD9621 pdf and datasheet GENERAL DESCRIPTION on: November 30, 2008, 10:28:57 PM
http://www.seekic.com/newstock/AD9621,AD9621AN,AD9621AR.html

AD9621 pdf and datasheet GENERAL DESCRIPTION
The AD9000 is a 6-bit, high speed, analog-to-digital converter
with ECL compatible outputs and a bipolar input stage. The
AD9000 is fabricated in a high performance bipolar process that
allows encode rates up to 77 MSPS.
The AD9000 employs the standard flash converter architecture
based on 64 individual comparators which simultaneously
determine the precise analog signal level. The comparators are
followed by two stages of decoding logic, allowing the AD9000
to operate with a very low error rate. The low 35 pF input
capacitance of the AD9000 greatly simplifies the analog driver
stage. An overflow output bit is also incorporated into the
AD9000 design as is a hysteresis control pin to modify comparator
sensitivity.
11  Electronic Design / Electronic Components / GENERAL DESCRIPTION The XC6101~XC6107, XC6111~XC6117 on: November 27, 2008, 11:38:26 PM
GENERAL DESCRIPTION The XC6101~XC6107, XC6111~XC6117 series aregroups of high-precision, low current consumption voltagedetectors with manual reset input function and watchdogfunctions incorporating CMOS process technology.  Theeries consist of a reference voltage source, delay circuit,comparator, and output driver.   With the built-in delay circuit, the XC6101 ~ XC6107,XC6111 ~ XC6117 series!ˉ ICs do not requireany externacomponents to output signals with release delay time.Moreover, with the manual reset function, reset can beasserted at any time.  The ICs produce two types ofoutput; VDFL (low when detected) and VDFH (high whendetected). With the XC6101 ~ XC6105, XC6111 ~ XC6115 series!ICs, the WD pin can be left open if the watchdog function
is not used.   Whenever the watchdog pin is opened, the internalcounter clears before the  watchdog timeout occurs.Since the manual reset pin is internally pulled up to the VINpin voltage level, the ICs can be used with the manualreset pin left unconnected if the pin is unused. The detect voltages are internally fixed 1.6V ~ 5.0V inincrements of 100mV, using laser trimming technology.
Six watchdog timeout period settings are available in arange from 6.25msec to 1.6sec. Seven release delay time 1 are available in a range from3.13msec to 1.6sec.

more informtion plz check here:

http://www.seekic.com/newstock/XC6366C273MR,XC6366D102MR,XC6366D103MR.html
12  Electronic Design / Product Design / TPSY687K002R0100 TPSY687M002R0100 TPT0410180K datasheet more detail check on: November 27, 2008, 12:04:33 AM
TPSY687K002R0100  TPSY687M002R0100  TPT0410180K  datasheet more detail check

http://www.seekic.com/newstock/TPSY687K002R0100,TPSY687M002R0100,TPT0410180K.html

TPS1100, TPS1100Y
SINGLE P-CHANNEL ENHANCEMENT-MODE MOSFETS

 Low rDS(on) . . . 0.18 W Typ at VGS = –10 V
 3 V Compatible
 Requires No External VCC
 TTL and CMOS Compatible Inputs
 VGS(th) = –1.5 V Max
 Available in Ultrathin TSSOP Package (PW)
 ESD Protection Up to 2 kV Per
MIL-STD-883C, Method 3015
description
The TPS1100 is a single P-channel enhancement-mode MOSFET. The device has been optimized for 3-V or 5-V power distribution in battery-powered systems by means of Texas Instruments LinBiCMOSE process. With a maximum VGS(th) of –1.5 V and an IDSS of only 0.5 mA, the TPS1100 is the ideal high-side switch for low-voltage, portable battery-management systems where maximizing battery life is a primary concern. The low rDS(on) and excellent ac characteristics (rise time 10 ns typical) make the TPS1100 the logical choice for low-voltage switching applications such as power switches for pulse-width-modulated (PWM) controllers or motor/bridge drivers.
The ultrathin thin shrink small-outline package or TSSOP (PW) version with its smaller footprint and
reduction in height fits in places where other P-channel MOSFETs cannot. The size advantage
is especially important where board real estate is at a premium and height restrictions do not allow
for a small-outline integrated circuit (SOIC) package.
13  Electronic Design / Product Design / 100321DMQB pdf anda tadasheet Features: on: November 25, 2008, 11:35:58 PM
http://www.seekic.com/newstock/100321DMQB,100321PC,100321QC.html

100321DMQB pdf anda tadasheet Features:
 All cast body machined to high tolerances. Guaranteed
standard dimensions for interchangeability of parts and
actuators.
 Shaft bushings are impact and corrosion resistant
materials. Protects the shaft from side thrust of actuators.
 Special double-V-shape of stem seal self-adjusts to protect
the stem area for either vacuum or pressure use.
 Stem and body are isolated from line media by seal
created between disc flats and flat surface of seat.
 The special snap-in Resil-O-Seat design fixes seat in
place without bonding. The Resil-O-Seat is 100% field
replaceable — no tools required.
 Molded O-ring in the Resil-O-Seat forms a seal against all
standard flanges. Gasketing requirements are eliminated.
 Disc edge is machined and buffed, providing a bubble tight
shutoff and maximum seat life.
 All valves are factory tested at their rated pressure
14  Electronic Design / Product Design / GENERAL DESCRIPTION The XC6101~XC6107, XC6111~XC6117 on: November 24, 2008, 12:13:00 AM
GENERAL DESCRIPTION The XC6101~XC6107, XC6111~XC6117 series aregroups of high-precision, low current consumption voltagedetectors with manual reset input function and watchdogfunctions incorporating CMOS process technology.  Theeries consist of a reference voltage source, delay circuit,comparator, and output driver.   With the built-in delay circuit, the XC6101 ~ XC6107,XC6111 ~ XC6117 series!ˉ ICs do not requireany externacomponents to output signals with release delay time.Moreover, with the manual reset function, reset can beasserted at any time.  The ICs produce two types ofoutput; VDFL (low when detected) and VDFH (high whendetected). With the XC6101 ~ XC6105, XC6111 ~ XC6115 series!ICs, the WD pin can be left open if the watchdog function
is not used.   Whenever the watchdog pin is opened, the internalcounter clears before the  watchdog timeout occurs.Since the manual reset pin is internally pulled up to the VINpin voltage level, the ICs can be used with the manualreset pin left unconnected if the pin is unused. The detect voltages are internally fixed 1.6V ~ 5.0V inincrements of 100mV, using laser trimming technology.
Six watchdog timeout period settings are available in arange from 6.25msec to 1.6sec. Seven release delay time 1 are available in a range from3.13msec to 1.6sec.

more informtion plz check here:

http://www.seekic.com/newstock/XC6366C273MR,XC6366D102MR,XC6366D103MR.html

15  Electronic Design / Product Design / The TC70/71 dataheet and pdf on: November 20, 2008, 11:51:45 PM
The TC70/71 dataheet and pdf

The TC70/71 is a fully-integrated power supply monitorwatchdog and battery backup circuit in a space-saving-pin package.When power is initially applied, the TC70/71 holds therocessor in its reset state for a minimum of 500msec afterV  is in tolerance to ensure stable system start-up.  After
CCtart-up, processor sanity is monitored by the on-boardwatchdog circuit. The processor must provide periodic high-o-low level transitions to the TC70/71 to verify properxecution.  Should the processor fail to supply this signawithin the specified timeout period, an out-of-control proces-or is indicated and the TC70/71 issues a momentaryrocessor reset as a result. The TC70 also features a
watchdog disable pin to facilitate system test and debug.The output of the TC70/71 can be wire-ORed to a push-utton switch (or electronic signal) to reset the processor.When connected to a push-button switch, the TC70/71rovides contact debounce.The integrated battery backup circuit on-board the TC70/1  converts CMOS RAM into nonvolatile memory by firstwrite-protecting, then switching the V  line of the RAM overCCo an external battery.

more information plz check here:

http://www.seekic.com/newstock/TC74LCX08FN,TC74LCX08FS,TC74LCX08FT.html
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